The importance of photonic integrated circuits (PICs) is growing in a wide range of applications, including communications, optical computing, automotive, aerospace, agriculture and medical. PICs are key enablers to meet the increasing demand for data transfer speed, bandwidth and performance. Our meeting will focus on the latest trends and considerations in the packaging and post-processing of PICs. We will cover a range of topics, including passive and active optical alignment, wafer-level versus die-level packaging and testing, thermal control, cost-effectiveness, volume production versus pricing, and new manufacturing requirements in co-package optics.
Among others, we deepen the discussion about how to ensure optimal performance and minimize development costs. In this case chip polishing, inspection of the polished end surface as well as effective testing of PICs throughout the development cycle are essential:

• • Requirements towards polishing technologies, while demonstrating automated systems featuring custom design holders that can be adjusted to user-specified angles to reduce back-reflection
  • Testing and measurement challenges and technologies to look inside PICs and evaluate the optical performance of the individual integrated components both in lab and production environments
  • Inspection technologies such as video monitoring systems to both observe the polishing process and inspect the quality of the polished surfaces.

Key industry players will join us to discuss the adoption of standards, as well as packaging requirements for emerging applications such as quantum photonics.
Overall, we aim to provide valuable insights into the latest developments in PIC packaging and post-processing. Our meeting will enable attendees to stay up-to-date with the latest industry trends and make informed decisions for their specific applications.

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